Dormant tube domino circuit used for low power consumption VLSI (very-large-scale integration)

Abstract

The utility model relates to a dormant tube domino circuit used for a low power consumption VLSI (very-large-scale integration), which comprises a signal input end, signal output end, a clock signal end, a dormant signal end, a precharge tube, a maintaining tube, a clock tube, dormant tubes, an output static phase inverter and a pull-down network. NMOS (n-channel metal oxide semiconductor) tubes in the maintaining tube, the dormant tube and the output static phase inverter are high-threshold transistors, and other transistors are of low threshold; the source electrode of a PMOS (p-channel metal oxide semiconductor) dormant tube is connected with a power supply, and the drain electrode is connected with the source electrode of a PMOS tube of the output static phase inverter; for the two NMOS dormant tubes, the source electrode of one NMOS dormant tube is connected with a dynamic node, and the source electrode of the other NMOS dormant tube is connected with an output end; the drain electrodes of the two NMOS dormant tubes are connected with ground voltage; in the dormant tube domino circuit used for the low power consumption VLSI, substrates of all PMOS tubes are connected with power supply voltage; and the substrates of all NMOS tubes are connected with the ground voltage.