Design Methodology of Very Large Scale Integration
The generalized Design Procedure for CAD circuit design is discussed; the connnercial CADs offered by CALMA and the Caesar System, supported by the Berkeley design tools are illustrated.
Abstract
Very Large S te Integration (VLSI) deals with system complexity rather than transistor size or circuit performance. VLSI design methodology is supported by Computer Aided Design (CAD) and Design Automation (DA) tools, which help VLSI designers to implement more complex and guaranteed designs. The increasing growth in VLSI complexity dictates a hierarchical design approach and the need for hardware DA tools. This paper discusses the generalized Design Procedure for CAD circuit design; the connnercial CADs offered by CALMA and the Caesar System, supported by the Berkeley design tools. A complete design of a Content Addressable Memory (CAM) cell, using the Caesar system, supported by Berkeley CAD tools, is illustrated.