A Circuit Extraction System and Graphical Display for VLSI (Very Large Scale Integrated) Design.
This research has the potential to provide savings of time and effort to engineers designing new circuits or reverse-engineering older circuits for which no adequate specifications exist and will also help to close the design cycle.
Abstract
Abstract : This thesis proposes a system for higher-order logic extraction of components from a net-list of transistors and the graphical display of the extracted components. Critical sections have been implemented to demonstrate the feasibility of the system. These sections include a prototype expert system written in CLIPS and a graphical display capable of displaying extracted components on a Sun workstation. Extraction techniques which were developed in this effort use pattern matching and multiple passes. Graphical techniques used in the display include simple line drawing and translation of images. This research has the potential to provide savings of time and effort to engineers designing new circuits or reverse-engineering older circuits for which no adequate specifications exist. This system will also help to close the design cycle and allow the designer to assure that what he has physically designed is what he has logically designed. (RRH)