Statistical design of MOS VLSI (Very Large Scale Integrated) circuits with designed experiments
The proposed approach approximates the circuit performances, such as gain and delay, by fitted models, and uses them as surrogates of the circuit simulator to predict and optimize the parametric yield with computation efficiency and to achieve off-line quality control.
Abstract
Abstract : A new approach for the statistical design and analysis of Metal Oxide Semiconductor is introduced. The proposed approach approximates the circuit performances, such as gain and delay, by fitted models. The fitted models are then used as surrogates of the circuit simulator to predict and optimize the parametric yield with computation efficiency and to achieve off-line quality control. The use of statistical design and analysis of experiments for model construction have been investigated theoretically and experimentally, and different methods to assess the adequacy of a fitted performance model have been studied.