Home / Papers / Low-Power CMOS VLSI Circuit Design

Low-Power CMOS VLSI Circuit Design

616 Citations2000
K. Roy, S. Prasad
journal unavailable

Low--Power CMOS VLSI Design and Test of Low--Voltage CMOS Circuits and Low--Energy Computing Using Energy Recovery Techniques.

Abstract

Low--Power CMOS VLSI Design. Physics of Power Dissipation in CMOS FET Devices. Power Estimation. Synthesis for Low Power. Design and Test of Low--Voltage CMOS Circuits. Low--Power Static Ram Architectures. Low--Energy Computing Using Energy Recovery Techniques. Software Design for Low Power. Index.