Neuromorphic Computing for the Masses
This work introduces SONIC, a software-defined hardware design methodology to make neuromorphic computing accessible to the general computing community, and evaluates SONIC using three spiking datasets.
Abstract
Neuromorphic computing describes the hardware implementation of biological neurons and synapses of spiking neural networks (SNNs). We introduce SONIC, a software-defined hardware design methodology to make neuromorphic computing accessible to the general computing community. SONIC is designed using three main components. First, SONIC integrates QUANTISENC, a parameterized SNN hardware writ-ten in Verilog HDL. This design consists of leaky integrate-and-fire (LIF) neurons and current-based (CUBA) synapses that are configured using Python to implement different SNN topologies. Second, SONIC integrates PRONTO, a SystemVerilog testbench that can be automatically synthesized using Python to benchmark this hardware against existing designs for different learning tasks and datasets. Finally, SONIC introduces a system software to interface with QUANTISENC, making it programmable and easy to prototype on FPGA and ASIC, starting from SNN specifications written in Python. Overall, SONIC offers a com-plete framework for simultaneously defining and training SNN models in software, generating its Verilog design, deploying model parameters to hardware, performing inference on live data, evaluating hardware performance, and visualizing inference results. We evaluate SONIC using three spiking datasets. Our results show the scalability and superior performance of SONIC in terms of area, throughput, and power compared to existing designs. SONIC is available as an open-source framework for the neuromorphic community to use without restriction.