Low power VLSI design and technology

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Abstract

Introduction to low-power VLSI design, G. Yeap and A. Wild low power design of off-chip drivers and transmission lines - a branch and bound approach, R. Gupta et al a new CMOS driver model for transient analysis and power dissipation analysis, H. Liao et al on the optimal drivers of high-speed low power ICs, D. Zhou and X.Y. Liu floorplan design with low power considerations, K.Y. Chao and D.F. Wong retiming sequential circuits for low power, J. Monteiro et al.