The Area-Time Complexity of Binary Multiplication
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TL;DR
By using a model of computation which is a realistic approx~mauon to current and anucipated LSI or VLSI technology, it is shown that A T 2.0 is shown to be the time required to perform multtphcaUon of n-bit binary numbers on a chip.
Abstract
article Free AccessThe Area-Time Complexity of Binary Multiplication Authors: R. P. Brent The Australian National University, Canberra, ACT 2600, Australia The Australian National University, Canberra, ACT 2600, AustraliaView Profile , H. T. Kung Department of Computer Science, Schenley Park, Carnegie-Mellon University, Pittsburgh, Pennsylvania, PA Department of Computer Science, Schenley Park, Carnegie-Mellon University, Pittsburgh, Pennsylvania, PAView Profile Authors Info & Claims Journal of the ACMVolume 28Issue 3July 1981 pp 521–534https://doi.org/10.1145/322261.322269Published:01 July 1981Publication History 148citation928DownloadsMetricsTotal Citations148Total Downloads928Last 12 Months38Last 6 weeks5 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF