Optimum voltage swing on on-chip and off-chip interconnect
IEEE Journal of Solid-State CircuitsPublished 1 July 2001
C. Svensson
Citations67
SJR quartileQ1
SJR score3.36
SNIP3.12
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Abstract
Reduced voltage swings are often used for saving power on interconnects. In this paper, we demonstrate the existence of an optimum voltage swing for minimum power consumption, for on-chip and off-chip interconnects. Actual values of optimum swings and corresponding power savings for high performance interconnects are estimated.
Keywords
Engineering
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