An analog neural network processor with programmable topology
IEEE Journal of Solid-State CircuitsPublished 1 January 1991
Bernhard E. Boser, Eduard Säckinger, Jane Bromley, Y. Le Cun, L. D. Jackel
Citations139
SJR quartileQ1
SJR score3.36
SNIP3.12
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TL;DR
The architecture, implementation, and applications of a special-purpose neural network processor are described and the practicality of the chip is demonstrated with an implementation of a neural network for optical character recognition.
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