Efficient trace-driven simulation methods for cache performance analysis
ACM Transactions on Computer SystemsPublished 1 August 1991Open access
Wen-Hann Wang, Jean-Loup Baer
Citations69
SJR quartileQ2
SJR score0.63
SNIP1.53
Generate an AI Snapshot to get a quick, structured summary of this paper.
Study Snapshot
ObjectiveStudy objective
MethodsResearch methodology
PopulationPopulation studied
Sample sizeSample sizes
OutcomesStudy outcomes here
ResultsStudy results comes here
LimitationsResearch study limitations comes here
A concise AI-generated summary of the paper will appear here once you click Generate AI Snapshot.
Abstract
article Free AccessEfficient trace-driven simulation methods for cache performance analysis Authors: Wen-Hann Wang IBM AWD Future Systems Technology IBM AWD Future Systems TechnologyView Profile , Jean-Loup Baer University of Washington University of WashingtonView Profile Authors Info & Claims ACM Transactions on Computer SystemsVolume 9Issue 3pp 222–241https://doi.org/10.1145/128738.128740Published:01 August 1991Publication History 43citation751DownloadsMetricsTotal Citations43Total Downloads751Last 12 Months38Last 6 weeks4 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF
Keywords
Computer Science
IBM Systems JournalEvaluation techniques for storage hierarchies
1,289 Citations1970R. L. Mattson, J. Gecsei +2 more
A new and efficient method of determining, in one pass of an address trace, performance measures for a large class of demand-paged, multilevel storage systems utilizing a variety of mapping schemes and replacement algorithms.
IEEE Transactions on ComputersEvaluating associativity in CPU caches
600 Citations1989Mark D. Hill, Alan Jay Smith
All-associativity simulation is theoretically less efficient than forest simulation or stack simulation (a commonly used simulation algorithm), in practice it is not much slower and allows the simulation of many more caches with a single pass through an address trace.
ACM SIGARCH Computer Architecture NewsA class of compatible cache consistency protocols and their support by the IEEE futurebus
279 Citations1986P. Sweazey, Alan Jay Smith
This paper defines a class of compatible consistency protocols supported by the current IEEE Futurebus design, referred to as the MOESI class of protocols, which has the property that any system component can select (dynamically) any action permitted by any protocol in the class, and be assured that consistency is maintained throughout the system.
ACM SIGARCH Computer Architecture NewsAvailable instruction-level parallelism for superscalar and superpipelined machines
277 Citations1989Norman P. Jouppi, D. W. Wall
Aspects of Cache Memory and Instruction Buffer Performance
247 Citations1987Mark D. Hill
Techniques are developed in this dissertation to efficiently evaluate direct-mapped and set-associative caches and examine instruction caches for single-chip RISC microprocessors, and it is demonstrated that instruction buffers will be preferred to target instruction buffers in future RISCmicroprocessors implemented on single CMOS chips.
IEEE Transactions on ComputersAccurate low-cost methods for performance evaluation of cache memory systems
191 Citations1988S. Laha, J.H. Patel +1 more
New methods of simulation based on statistical techniques are proposed for decreasing the need for large trace measurements and for predicting true program behavior, and a new concept of primed cache is introduced to simulate large caches by the sampling-based method.
Kluwer international series in engineering and computer scienceAnalysis of Cache Performance for Operating Systems and Multiprogramming
104 Citations1989Anant Agarwal
This work focuses on the development of a Analytical Cache Model for Multiprogramming Cache Performance, which automates the very labor-intensive and therefore time-heavy and expensive process of manually cataloging and analyzing caches.
IEEE Transactions on Software EngineeringTwo Methods for the Efficient Analysis of Memory Address Trace Data
90 Citations1977Alan Jay Smith
There is little or no loss in accuracy using reduced traces for many purposes for a wide range of memory sizes and degrees of reduction.
ACM SIGARCH Computer Architecture NewsMultiprocessor cache analysis using ATUM
81 Citations1988Richard L. Sites, Anant Agarwal
Mache: no-loss trace compaction
81 Citations1989A. Dain Samples
This technique is unlike previously reported trace compression techniques in that it compresses without loss of information and, therefore, does not affect trace-driven simulation time or accuracy.
Efficient Analysis of Caching Systems
64 Citations1987James Gordon Thompson, Alan Jay Smith
These techniques are significant extensions to the stack analysis technique (Mattson et al., 1970) which computes the read miss ratio for all cache sizes in a single trace-driven simulation, and are used to study caching in a network file system.
ACM Transactions on Computer SystemsEfficient (stack) algorithms for analysis of write-back and sector memories
52 Citations1989James G. Thompson, Alan Jay Smith
The technique permits efficient computations for algorithms or systems using periodic write-back and/or block deletion and permits stack analysis simulation for sector (or subblock) caches in which a sector consists of subsectors that can be loaded independently.
IBM Systems JournalOn-line inquiry under a small-system operating system
17 Citations1970K. Darga
An option to a small operating system that permits interruptions of a job, execution of a program to handle an inquiry, and return to the interrupted job is discussed.