Built-in test for complex digital integrated circuits

IEEE Journal of Solid-State CircuitsPublished 1 June 1980

B. Konemann, G. Zwiehoff, J. Mucha

DOI10.1109/jssc.1980.1051391

Source URL

Citations158

SJR quartileQ1

SJR score3.36

SNIP3.12

TL;DR

A method for testing the logic function of complex digital integrated circuits is presented based on built-in test, which demonstrates the feasibility of the proposed method by results from both hardware and logic simulation.

Abstract

A method for testing the logic function of complex digital integrated circuits is presented. The extra hardware needed is kept minimal by functional conversion of already existing components (e.g., registers). The feasibility of the proposed method is demonstrated by results from both hardware simulation and logic simulation. The method is based on an adapted version of signature analysis, and on circuit partitioning (the structure of VLSI circuits is assumed to be inherently modular).

Keywords

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