Computer Aided Verification
Lecture notes in computer sciencePublished 1 January 1993
Gerhard Goos, Universitfit Postfach
Citations12
SJR quartileQ2
SJR score0.35
SNIP0.55
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Abstract
This volume gives the proceedings of the Fourth Workshop on Computer-Aided Verification (CAV '92), held in Montreal, June 29 - July 1, 1992. The objective of this series of workshops is to bring toget
Keywords
Computer ScienceEngineering
Lecture notes in computer scienceDesign verification of a microprocessor using branching time regular temporal logic
3 Citations1993Kiyoharu Hamaguchi, Hiromi Hiraishi +1 more
This paper reports about design verification of a real microprocessor using a symbolic model checking algorithm for a variant of branching time temporal logics, i.e. branching time regular temporal logic (BRTL).