Area-efficient CMOS charge pumps for LCD drivers

IEEE Journal of Solid-State CircuitsPublished 30 September 2003

TianRui Ying, Wing‐Hung Ki, Mansun Chan

DOI10.1109/jssc.2003.817596

Source URL

Citations98

SJR quartileQ1

SJR score3.36

SNIP3.12

Abstract

Area-efficient 4× charge pumps based on the cross-coupled structure that uses the V/sub dd/-2V/sub dd/ outputs alternately to reduce the number of power devices and capacitors are presented. Compared with conventional designs, our best design can save two power transistors, one capacitor, and two level shift circuits. An integrated 4× charge pump is then designed to deliver 100 μA at 9 V using a 0.8-μm AMS high-voltage CMOS process. The topology can be extended to 2n× charge pumps, and a 6× charge pump is also fabricated and tested to demonstrate the validity of the extension.

Keywords

Engineering

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